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Mesa 5i25 + 7i76: HAL Pins

Some notes on setting up the Mesa 5i25 FPGA card (the manual) with the 7i76 daughter card (the manual) inside a new-to-me off-lease Dell Optiplex 760

First up: note that Mesa uses a capital I (“eye”) in the part numbers, a decision which they’ve surely had plenty of time to regret, as many common fonts exhibit nearly identical capital-I and digit-1 characters.

The 7i76 connects to the 5i25 in the PC through a Mesa-supplied IEEE-1284 printer cable. I cobbled up a 24 VDC power supply (which I’ll eventually be using for the M2 motors) to provide “field power” and let the firmware identify the daughtercard:

24 VDC power supply - Mesa 7i76 - stepper driver

24 VDC power supply – Mesa 7i76 – stepper driver

The default jumper positions on both cards work fine.

The unconnected stepper driver brick and motor will serve as a simple demonstration after I’ve built the Eagle parts to represent the 5i25’s components. However, the first demo of any new hardware must be a blinking LED.

To see whether the cards work and are detected, load the hostmot2 drivers in halrun and dump all the information:

halrun
halcmd: loadrt hostmot2
halcmd: loadrt hm2_pci
halcmd: show all
Loaded HAL Components:
ID      Type  Name                                      PID   State
     5  RT    hm2_pci                                         ready
     3  User  halcmd5010                                 5010 ready
     4  RT    hostmot2                                        ready

Component Pins:
Owner   Type  Dir         Value  Name
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-00
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-00-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-01
... snippage ...
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-30
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-30-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-31
     5  bit   OUT         FALSE  hm2_5i25.0.7i76.0.0.input-31-not
     5  bit   IN          FALSE  hm2_5i25.0.7i76.0.0.output-00
     5  bit   IN          FALSE  hm2_5i25.0.7i76.0.0.output-01
... snippage ...
     5  bit   IN          FALSE  hm2_5i25.0.7i76.0.0.output-15
     5  bit   IN          FALSE  hm2_5i25.0.7i76.0.0.spindir
     5  bit   IN          FALSE  hm2_5i25.0.7i76.0.0.spinena
     5  float IN              0  hm2_5i25.0.7i76.0.0.spinout
     5  s32   OUT             0  hm2_5i25.0.encoder.00.count
     5  s32   OUT             0  hm2_5i25.0.encoder.00.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.00.index-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.00.position
     5  float OUT             0  hm2_5i25.0.encoder.00.position-latched
     5  s32   OUT             0  hm2_5i25.0.encoder.00.rawcounts
     5  s32   OUT             0  hm2_5i25.0.encoder.00.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.reset
     5  float OUT             0  hm2_5i25.0.encoder.00.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.01.count
... snippage ...
     5  float OUT             0  hm2_5i25.0.encoder.01.velocity
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.000.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.000.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.001.in
... snippage ...
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.032.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.032.in_not
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.033.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.033.in_not
     5  bit   IN          FALSE  hm2_5i25.0.led.CR01
     5  bit   IN          FALSE  hm2_5i25.0.led.CR02
     5  u32   IN     0x00000000  hm2_5i25.0.sserial.channel
     5  u32   IN     0x00000000  hm2_5i25.0.sserial.parameter
     5  u32   IN     0x00000000  hm2_5i25.0.sserial.port
     5  u32   OUT    0x00000000  hm2_5i25.0.sserial.port-0.fault-count
     5  u32   OUT    0x00000000  hm2_5i25.0.sserial.port-0.port_state
     5  bit   IN           TRUE  hm2_5i25.0.sserial.port-0.run
     5  bit   IN          FALSE  hm2_5i25.0.sserial.read
     5  u32   OUT    0x00000000  hm2_5i25.0.sserial.state
     5  u32   IN     0x00000000  hm2_5i25.0.sserial.value
     5  bit   IN          FALSE  hm2_5i25.0.sserial.write
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.00.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.00.counts
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.00.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.00.enable
     5  float IN              0  hm2_5i25.0.stepgen.00.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.00.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.00.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.00.velocity-fb
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.01.control-type
... snippage ...
     5  float OUT             0  hm2_5i25.0.stepgen.09.velocity-fb
     5  bit   I/O         FALSE  hm2_5i25.0.watchdog.has_bit

... snippage ...

Parameters:
Owner   Type  Dir         Value  Name
     5  bit   RW          FALSE  hm2_5i25.0.7i76.0.0.output-00-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i76.0.0.output-01-invert
... snippage ...
     5  bit   RW          FALSE  hm2_5i25.0.7i76.0.0.output-15-invert
     5  u32   RO     0x100000A5  hm2_5i25.0.7i76.0.0.serial-number
     5  bit   RW          FALSE  hm2_5i25.0.7i76.0.0.spindir-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i76.0.0.spinena-invert
     5  float RW            100  hm2_5i25.0.7i76.0.0.spinout-maxlim
     5  float RW              0  hm2_5i25.0.7i76.0.0.spinout-minlim
     5  float RW            100  hm2_5i25.0.7i76.0.0.spinout-scalemax
     5  u32   RO     0x00000000  hm2_5i25.0.7i76.0.0.status
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.00.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.00.scale
     5  float RW            0.5  hm2_5i25.0.encoder.00.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.01.counter-mode
... snippage ...
     5  float RW            0.5  hm2_5i25.0.encoder.01.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.gpio.000.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.000.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.001.invert_output
... snippage ...
     5  bit   RW          FALSE  hm2_5i25.0.gpio.030.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.030.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.030.is_output
     5  bit   RW          FALSE  hm2_5i25.0.io_error
     5  s32   RO              0  hm2_5i25.0.pet_watchdog.time
     5  s32   RW              0  hm2_5i25.0.pet_watchdog.tmax
     5  s32   RO              0  hm2_5i25.0.read.time
     5  s32   RW              0  hm2_5i25.0.read.tmax
     5  s32   RO              0  hm2_5i25.0.read_gpio.time
     5  s32   RW              0  hm2_5i25.0.read_gpio.tmax
     5  u32   RW     0x00000001  hm2_5i25.0.sserial.port-0.fault-dec
     5  u32   RW     0x0000000A  hm2_5i25.0.sserial.port-0.fault-inc
     5  u32   RW     0x000000C8  hm2_5i25.0.sserial.port-0.fault-lim
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.00.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.00.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.00.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.stepspace
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.01.dirhold
... snippage ...
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.09.stepspace
     5  u32   RW     0x004C4B40  hm2_5i25.0.watchdog.timeout_ns
     5  s32   RO              0  hm2_5i25.0.write.time
     5  s32   RW              0  hm2_5i25.0.write.tmax
     5  s32   RO              0  hm2_5i25.0.write_gpio.time
     5  s32   RW              0  hm2_5i25.0.write_gpio.tmax

Parameter Aliases:
 Alias                                      Original Name

Exported Functions:
Owner   CodeAddr  Arg       FP   Users  Name
 00005  fc3d2582  f1b17000  NO       0   hm2_5i25.0.pet_watchdog
 00005  fc3c49dc  f1b17000  YES      0   hm2_5i25.0.read
 00005  fc3c4906  f1b17000  YES      0   hm2_5i25.0.read_gpio
 00005  fc3c4936  f1b17000  YES      0   hm2_5i25.0.write
 00005  fc3c48d6  f1b17000  YES      0   hm2_5i25.0.write_gpio

... snippage ...

Extract the 5i25 pin assignments from the kernel log file:
dmesg | grep hm2

Which produces this:

[ed@lcnc-m2 LinuxCNC for M2]$ dmesg | grep hm2
[ 7299.887856] hm2: loading Mesa HostMot2 driver version 0.15
[ 7407.514601] hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7
[ 7407.514631] hm2_pci 0000:04:02.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
[ 7407.514634] hm2_pci: discovered 5i25 at 0000:04:02.0
[ 7407.514656] hm2: no firmware specified in config modparam!  the board had better have firmware configured already, or this won't work
[ 7407.515018] hm2/hm2_5i25.0: Smart Serial Firmware Version 38
[ 7407.632326] hm2/hm2_5i25.0: 34 I/O Pins used:
[ 7407.632329] hm2/hm2_5i25.0:     IO Pin 000 (P3-01): StepGen #0, pin Direction (Output)
[ 7407.632331] hm2/hm2_5i25.0:     IO Pin 001 (P3-14): StepGen #0, pin Step (Output)
[ 7407.632334] hm2/hm2_5i25.0:     IO Pin 002 (P3-02): StepGen #1, pin Direction (Output)
[ 7407.632336] hm2/hm2_5i25.0:     IO Pin 003 (P3-15): StepGen #1, pin Step (Output)
[ 7407.632338] hm2/hm2_5i25.0:     IO Pin 004 (P3-03): StepGen #2, pin Direction (Output)
[ 7407.632340] hm2/hm2_5i25.0:     IO Pin 005 (P3-16): StepGen #2, pin Step (Output)
[ 7407.632343] hm2/hm2_5i25.0:     IO Pin 006 (P3-04): StepGen #3, pin Direction (Output)
[ 7407.632345] hm2/hm2_5i25.0:     IO Pin 007 (P3-17): StepGen #3, pin Step (Output)
[ 7407.632347] hm2/hm2_5i25.0:     IO Pin 008 (P3-05): StepGen #4, pin Direction (Output)
[ 7407.632349] hm2/hm2_5i25.0:     IO Pin 009 (P3-06): StepGen #4, pin Step (Output)
[ 7407.632352] hm2/hm2_5i25.0:     IO Pin 010 (P3-07): Smart Serial Interface #0, pin TxData0 (Output)
[ 7407.632354] hm2/hm2_5i25.0:     IO Pin 011 (P3-08): Smart Serial Interface #0, pin RxData0 (Input)
[ 7407.632356] hm2/hm2_5i25.0:     IO Pin 012 (P3-09): IOPort
[ 7407.632358] hm2/hm2_5i25.0:     IO Pin 013 (P3-10): IOPort
[ 7407.632360] hm2/hm2_5i25.0:     IO Pin 014 (P3-11): Encoder #0, pin Index (Input)
[ 7407.632362] hm2/hm2_5i25.0:     IO Pin 015 (P3-12): Encoder #0, pin B (Input)
[ 7407.632364] hm2/hm2_5i25.0:     IO Pin 016 (P3-13): Encoder #0, pin A (Input)
[ 7407.632367] hm2/hm2_5i25.0:     IO Pin 017 (P2-01): StepGen #5, pin Direction (Output)
[ 7407.632369] hm2/hm2_5i25.0:     IO Pin 018 (P2-14): StepGen #5, pin Step (Output)
[ 7407.632371] hm2/hm2_5i25.0:     IO Pin 019 (P2-02): StepGen #6, pin Direction (Output)
[ 7407.632373] hm2/hm2_5i25.0:     IO Pin 020 (P2-15): StepGen #6, pin Step (Output)
[ 7407.632376] hm2/hm2_5i25.0:     IO Pin 021 (P2-03): StepGen #7, pin Direction (Output)
[ 7407.632378] hm2/hm2_5i25.0:     IO Pin 022 (P2-16): StepGen #7, pin Step (Output)
[ 7407.632380] hm2/hm2_5i25.0:     IO Pin 023 (P2-04): StepGen #8, pin Direction (Output)
[ 7407.632382] hm2/hm2_5i25.0:     IO Pin 024 (P2-17): StepGen #8, pin Step (Output)
[ 7407.632385] hm2/hm2_5i25.0:     IO Pin 025 (P2-05): StepGen #9, pin Direction (Output)
[ 7407.632387] hm2/hm2_5i25.0:     IO Pin 026 (P2-06): StepGen #9, pin Step (Output)
[ 7407.632389] hm2/hm2_5i25.0:     IO Pin 027 (P2-07): IOPort
[ 7407.632391] hm2/hm2_5i25.0:     IO Pin 028 (P2-08): IOPort
[ 7407.632392] hm2/hm2_5i25.0:     IO Pin 029 (P2-09): IOPort
[ 7407.632394] hm2/hm2_5i25.0:     IO Pin 030 (P2-10): IOPort
[ 7407.632396] hm2/hm2_5i25.0:     IO Pin 031 (P2-11): Encoder #1, pin Index (Input)
[ 7407.632398] hm2/hm2_5i25.0:     IO Pin 032 (P2-12): Encoder #1, pin B (Input)
[ 7407.632401] hm2/hm2_5i25.0:     IO Pin 033 (P2-13): Encoder #1, pin A (Input)
[ 7407.632443] hm2/hm2_5i25.0: registered
[ 7407.632445] hm2_5i25.0: initialized AnyIO board at 0000:04:02.0
[ 7487.136417] hm2_5i25.0: dropping AnyIO board at 0000:04:02.0
[ 7487.136422] hm2/hm2_5i25.0: unregistered
[ 7487.136440] hm2_pci 0000:04:02.0: PCI INT A disabled
[ 7487.136459] hm2_pci: driver unloaded
[ 7487.138640] hm2: unloading

I am, perhaps, easily confused, but it took me a while to realize those pin assignments apply to the 5i25 back panel and on-card connectors, not the 7i76 daughter card’s screw terminals. Yeah, it says 5i25 right there in the dump, but …

The Fine 7i76 Manual gives the 7i76 pin connections, so they’re not even slightly hidden. [sigh]

Next, to see if it actually works …

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